As an example of conventional image display devices, an active matrix type liquid crystal display device will be explained. As shown in FIG. 11, the known liquid crystal display device of the active matrix type includes a pixel array ARY, a scanning signal line drive circuit GD, a data signal line drive circuit SD and a pre-charging circuit PC.
The pixel array ARY includes a plurality of scanning signal lines GL1 to GLj and data signal lines SDL1 to SDLi. These scanning signal lines and data signal lines are disposed so as to form a matrix, and pixels PIX are disposed in a matrix form such that each pixel PIX is located in an area surrounded by adjoining two scanning signal lines GL and adjoining two data signal lines SDL. As shown in FIG. 12, each pixel PIX includes a switch element SW, a liquid crystal capacitor CL and a subsidiary capacitor CS.
As shown in FIG. 11, the data signal line drive circuit SD includes a shift register and a sampling circuit. The data signal line drive circuit SD is provided for sampling video signals DAT as inputted to the sampling circuit SAM in synchronization with a timing signal such as a data clock signal CKS, a data sampling start signal SPS, etc., and writing a signal corresponding to the timing of the data clock signal CKS into each data signal line SDL.
As shown in FIG. 11, the scanning signal line drive circuit GD includes a shift register. The scanning signal line drive circuit GD sequentially selects scanning signal lines GL in synchronization with a timing signal such as a scanning clock signal CKG, a scanning start signal SPG, etc., and opens and closes a switching element SW of each pixel PIX. As a result, the scanning signal line drive circuit GD writes a signal voltage of a video signal DAT as sampled by each sampling circuit SAM into a data signal line SDL, and further writes the signal voltage into a capacitor of each pixel PIX, and holds a potential of the video signal DAT in capacitors CL and CS of each pixel PIX.
The pre-charging circuit PC performs a sampling of a pre-charge potential PCV as inputted in synchronization with a timing of a pre-charge control signal PCC and writes the pre-charge potential PCV before the video signal DAT as sampled is written into each data signal line SDL. The foregoing technique is clearly disclosed in Japanese Unexamined Patent Publication No. 295521/1995 (Tokukaihei 7-295521) (Publication Date: Nov. 10, 1995).
For liquid crystal displays, it is required that an application voltage to pixels PIX applies AC potential at a predetermined cycle in order to prevent deterioration of liquid crystals. Therefore, it is required for the video signal DAT as a source of a signal to be written into pixels PIX that its polarity be inverted at a predetermined period even for the video signal DAT of the same video data.
In reference to FIG. 12, a pixel structure PIX will be explained. As shown in FIG. 12, one end of a capacitor which constitutes each pixel PIX is connected to a data signal line SDL via a switching element SW, and the other end is connected to a common electrode COM to which a counter potential VCOM is applied. More specifically, a difference in potential between a signal written into the pixel PIX via the switching element SW and the counter potential VCOM is applied to a liquid crystal through the data signal line SDL. Further, by modulating light passed through or reflected from the liquid crystal according to an effective voltage of the potential being applied to the liquid crystal, a variety of display states can be realized.
In this example, it is assumed that the counter potential VCOM is a DC potential. Namely, the polarity of the video signal, whether positive or negative is defined based on this counter potential VCOM as a reference potential.
Examples of driving methods for the liquid crystals include:
(1) 1H inverse driving method (gate line inverse driving method) for inverting a polarity of a video signal at every horizontal scan period (hereinafter referred to as 1H);
(2) frame inverse driving method for inverting a polarity of a video signal every frame of the video signal or every field of the video signal;
(3) source line inverse driving method for inverting a polarity of a video signal at every frame of the video signal or at every field of the video signal in such a manner that any adjacent two data signal lines have different polarities; and                (4) dot inverse driving method in combination of the above (3) source line inverse driving method and (1) 1H inverse driving method.        
Here, explanations will be given through the case of the (1) 1H inverse driving method.
For example, pixels PIX connected to the data signal line SDLn (1≦n≦i) are first charged to a pre-charge potential PCV of a positive polarity or negative polarity by the pre-charging circuit PC. Subsequently, the data signal line drive circuit SD is driven by the data sampling start signal SPS and the data clock signal CKS, and samples video signals DAT of positive or negative polarity and write signals as sampled in the data signal line SDL. Subsequently, the scanning signal line drive circuit GD opens each switching element SW of a pixel PIX connected to the scanning signal line GLn (1≦n≦j), to allow signals as sampled to be rewritten into respective liquid crystal capacitors CL and subsidiary capacitors CS. Then, upon completing a selection of the scanning signal line GLn, the liquid crystal capacitors CL and the subsidiary capacitors CS of the pixels PIX are separated from the data signal line SDL by the switching elements SW, and the scanning signal line drive circuit GD holds the signals as sampled and written into the pixels PIX. In this example, one end of each pixel PIX is connected to a counter potential VCOM, but the other end that is connected to the switching element SW is separated. Thus, the liquid crystal capacitor CL and the subsidiary capacitor CS of the pixel PIX are in a floating state. Further, the liquid crystal capacitor CL and the subsidiary capacitor CS of the pixel PIX are adjacent to the data signal line, and thus these capacitors have parasitic capacitances (fringe capacitances) Cf with respect to the data signal line as shown in FIG. 12.
When the pre-charge potential of negative polarity or positive polarity is written from the pre-charging circuit PC before carrying out the next scanning operation, due to the effect of the pre-charge potential via the parasitic capacitor Cf, respective potentials of the liquid crystal capacitor CL and the subsidiary capacitor CS of the pixel PIX vary as being abruptly attracted to the negative polarity side or the positive polarity side (hereinafter referred to as pixel potential fluctuations).
Then, upon completing a writing of an image into pixels PIX for the scanning signal lines GL1 to GLj (j>1), in order to save power consumption, a supply of signals from the control signal generating circuit CTL to the data signal line drive circuit SD, the scanning signal line drive circuit GD, and preliminary charging circuit PC is stopped.
Assumed, for example, that scanning signal lines of j=2m (m≧1) are disposed, and a video signal of positive polarity is written into the pixels PIX connected to the first scanning signal line GL1. Then, a video signal of negative polarity would be written in the last scanning signal line GLj (j=2m). Namely, a video signal of positive polarity is written into pixels PIX connected to odd numbered scanning signal lines, while a video signal of negative polarity is written into pixels PIX connected to even numbered scanning signal lines. In this example, the pre-charging of the data signal lines is carried out upon completing the writing of signals into the pixels PIX. Thus, after the last scanning operation, the data signal line is precharged in positive polarity. FIG. 13 shows the state where each signal and pixel polarity varies at vertical retrace interval. Assumed here that respective pixels PIX store the video signal data in different polarities.
FIG. 13 shows the potential PIXVodd of pixels connected to the odd numbered scanning line signal GLodd, the potential PIXVeven of pixels connected to even numbered scanning signal lines GLeven, pre-charge potential PCV, and signal potentials of the pre-charge control signal PCC and the data signal line SDL. A potential difference between the potential PIXVodd and PIXVeven of each pixel and the counter potential VCOM is applied to the pixel, and a transmittance of light is determined by the resulting effective voltage value.
However, as shown in FIG. 13, respective pixel potentials PIXVodd and PIXVeven vary by parasitic capacity Cf according to polarities of i) the pre-charge potential PCV supplied to the data signal line SDL by the pre-charge control signal PCC, and ii) the signal potential obtained by sampling the video signal DATA supplied from the data signal line drive circuit SD. In the vertical retrace interval, a supply of a control signal from the control signal generating circuit CTL is stopped, and thus the potential as varied according to the polarity of the last data signal line is held in the liquid crystal capacitor CL and the subsidiary capacitor CS of the pixel PIX. Therefore, fluctuations in pixel potential deviate throughout the vertical retrace interval, and thus light modulation as determined by an effective voltage of a potential applied to liquid crystals vary, thereby presenting the problem that the displayed content differs for the same video signal data. Specifically, in an event of an intermediate gray scale display, a moire appears due to differences in brightness between pixels connected to even-numbered scanning signal lines and odd-numbered scanning signal lines.
The problem of decrease in image quality occurs also in the driving method of liquid crystals adopting an AC potential for the counter potential VCOM. Fluctuations in pixel potential in this case are shown in FIG. 14. In FIG. 14, during the vertical retrace interval, the pixel potential PIXVodd and the pixel potential PIXVeven vary according to changes in pre-charge potential of the data signal line at the start of the vertical retrace interval, and the data signal line SDL is not precharged subsequently. Thus, although the pixel potential fluctuations can be reduced, a potential difference between the charge of the pixel PIX and the counter potential VCOM differs between i) the potential PIXVodd of the pixels connected to the odd-numbered scanning signal line and ii) the potential PIXVeven of the pixels connected to the even-numbered scanning signal lines, resulting in the problem of moire.
Recently, in order to reduce the power consumption of the backlight provided at the back surface of the liquid crystal display device, an attempt has been made to realize an increased aperture ratio to improve the transmittance of light for pixels PIX of the liquid crystal display device. When an aperture of the pixel PIX is increased, an area occupied by the electrodes which constitute pixels PIX becomes larger, and the distance between the data signal line and the pixel electrode is reduced. As the size of the capacitance component is anti-proportional to the distance between electrodes, as the distance is reduced, the capacitance component becomes larger. Therefore, the parasitic capacitor Cf becomes relatively larger than the liquid crystal capacitor CL and the capacitor CS shown in FIG. 12, and the problem of decrease in image quality is likely to occur.
In the foregoing prior art example, effects of the potential as charged by the pre-charging circuit PC has been discussed. However, the above-explained problem of image quality deterioration likely to occur even for the structure without the pre-charging circuit, i.e., without an applied pre-charge potential to the data signal line for the following reason. That is, an AC potential whose polarity is inverted at a predetermined period is applied to the data signal line by the data signal line drive circuit. Therefore, upon completing a writing operation for 1 screen, the potential of either polarity is supplied to the data signal line SDL, resulting in the problem of decrease in image quality as in the aforementioned case.